WInSiC4AP

Wide band gap Innovative Sic for Advanced Power
Logo del progetto winsic4ap
Classificazione: 
internazionali
Programma: 
Horizon 2020
Call / Bando: 
Call ECSEL-2016-1-RIA-two-stage
Settore ERC: 
Physical Sciences and Engineering
Ruolo Unict: 
Partner
Durata del progetto in mesi: 
36
Data inizio: 
Giovedì, 1 Giugno 2017
Data fine: 
Lunedì, 1 Giugno 2020
Costo totale: 
€ 15.013.599,00
Quota Unict: 
€ 290.500,00
Coordinatore: 
Distretto Tecnologico Micro e Nano Sistemi SCARL
Responsabile/i per Unict: 
Mario Cacciato
Dipartimenti e strutture coinvolte: 
Dipartimento di Ingegneria elettrica, elettronica e informatica
Altri partner: 

ST Microelectronics SRL (Italy) – Università degli Studi di Catania (Italy) - Nexter Electronics (France) - Valeo Systemes De Controle Moteur SAS (France) - Consorzio Nazionale Interuniversitario per la Nanoelettronica (Italy) - Università degli Studi di Messina (Italy) - Ceske Vysoke Uceni Technicke V Praze (Czech Republic) - Gottfried Wilhelm Leibniz Universitaet Hannover (Germany) - Consiglio Nazionale delle Ricerche (Italy) - Zodiac Aero Electric SAS (France) – APOJEE (France) - APSI3D (France) S.A.T.Siciliana Articoli Tecnici SRL (Italy) WURTH Elektronik Eisos GMBH & CO KG (Germany) - Universite Francois Rabelais de Tours (France) - Institut Mikroelektronickych Aplikaci S.R.O.
(Czech Republic) - E-DISTRIBUZIONE SPA (Italy) - SOFTECO SISMAT SRL (Italy) - Distretto Tecnologico Aerospaziale della Campania SCARL (Italy)

ABSTRACT

WInSiC4AP core objective is to contribute in developing reliable technology bricks for efficient and cost-effective applications addressing social challenges and market segments where Europe is a recognized global leader as well as automotive, avionics, railway and defence. WInSiC4AP approach is to rely on the strength of vertical integration allowing optimization, technologies fitting application requirements, developing the full ecosystem and approach relevant issues as reliability in the full scope. That enhances the competitiveness of EU- Industries as well as TIER1 and TIER2 down to the value chain in a market context where other countries today, such as the USA or Japan, are advancing and new players accessing SiC enter in the market. New topologies and architecture will be developed for targeted application simulating operational environment, at laboratory level, driving the needed and still missed technologies, components and demonstrators to fill the gap between current state of the art and the very high demanding specifications. WInSiC4AP framework has been built so that companies working in different domains (i.e. automotive car maker and TIER1-2 and avionics, railway and defence TIER1-TIER2) and in the vertical value chain (semiconductor suppliers, companies manufacturing inductors and capacitors) as well as academic entities and laboratories will collaborate to co-design solutions, solve problems and exchange know-how, such that unforeseen results may also emerge. WInSiC4AP will be supported with synergy between ECSEL JU and ESI funding enabling complementary activities with relevant economic and social impact envisage in a less development region of Union